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Introduction To Crystals And Oscillators

Published on May 17, 2013 by in FPGA

At the heart of any FPGA you will have an oscillator that creates a stable clock signal. This signal is generated from a physical crystal (quartz) which once run through with electricity, will oscillate at its resonant frequency.  Oscillators contain both the resonator (crystal) and the electronic component (the amplifier) which are both required to maintain the oscillations.

In reference to the picture above, here is a listing of many commonly used oscillators:

Crystals (2 pins):

  • 1. HC-49/SD crystal (SMD)
  • 2. HC-49/US crystal
  • 3. HC-49/U crystal

Oscillators (4 pins):

  • 4. DIL-14 “Full size” metal case (the metal case brought the nickname “canned oscillator”)
  • 5. DIL-8 “Half size” metal case
  • 6. DIL-8 “Half size” plastic case
  • 7. 5x7mm metal case (SMD)

FPGA 4 Fun has a great article up about crystals and oscillators for those of you who like to always keep learning.  If you’re new to FPGAs we try to post little tidbits like this from time to time to help round out your knowledge base of all things FPGA.  Check out the full article:

(via FPGA4Fun)

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Hand-Tracking Pong Game On FPGA

Published on May 15, 2013 by in FPGA


Cornell University students Hanting Lu and Kedari Elety have made an FPGA-based, hand-tracking Pong game for their final class project this year. They’ve got an HTC 231x CCD camera feeding video data to their Altera DE-2 FPGA, which is processing the hand motion data and using it to control a game of Pong.

The NTSC video signal from the camera is stored in the SDRAM at the rate of the TV Decoder Line clock (TD_CLK). Data is read from the SDRAM each time the VGA requests data. The data from the SDRAM is in YUV format which needs to be converted to RGB before sending it to the VGA. For skin detection, we added a filter at this converting module level such that in addition to the R,G and B values, the module also outputs a one bit binary 1 if it corresponds to a skin pixel. Else, zero. By doing this, the output on the VGA is now white corresponding to skin pixels and black otherwise.

The idea was to parallelize all processes like skin-detection, centroid computation, ball control and sound generation in order to make the system as efficient as possible. However, there is scope to further improve the detection mechanism. The distance of the user’s hand from the camera affects the width and height of the hand detected and if too close, it is equivalent to a human face. Hence, a more robust mechanism can be developed to make it independent of the distance of the user from the camera.


You can check out the full project page here, complete with more photos, a diagram of the logic structure that they used, and their program/hardware design logs. Reminds me a lot of Kinect, for some odd reason… Way to go, guys!

(via Cornell University student project pages)

 
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Bitcoin Mining On A Repurposed FPGA

Published on May 13, 2013 by in FPGA


Here’s a cool hack. Taylor Killian was on Reddit one day and came across a post that gave him an idea. Long story short, he found an HDMI color processing board (make/model: eeColor Color3) on Newegg for *free* after rebate. This device just happens to contain an FPGA - an Altera Cyclone 4, 30K logic element FPGA (the blue board pictured above). Hmmm. What to do?

Taylor decided to put this little gem to use by loading up an open-source Bitcoin miner.  A no-brainer, right?  Taylor says:

Right out the door it is capable of 15 megahashs/sec. While this is nothing compared to the ASICs that are on the market or fast GPUs, it is still comparable to CPU mining. Using the killowatt I measured it’s power consumption at 2.5 watts while mining. My i7 processor also can mine bitcoins at max of around 15 megahashs/sec. I for one am impressed…

Not bad at all for a free FPGA!  Make sure to check out Taylor’s original article – it’s a great read, complete with all the details of the project.

(via Hackaday, via Taylor Killian)

 
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FPGA Audio Visualizer Project

Published on May 8, 2013 by in FPGA


Embedded Systems Design student Zhemao and his class group have been working on an FPGA FFT audio visualizer for their final project. Their design was implemented entirely in VHDL on an Altera DE2 board, the results of which are all bouncy and blue in the above vid. Basically, it’s a hardware audio player that reads audio from an SD card and plays it on the DE2 board’s audio codec while simultaneously displaying an FFT visualization of the audio samples.

Here’s what Zhemao has to say about his group’s project:

We have 256 frequency bins and sum groups of 16 to display on the monitor. We use a 256-point radix-16 Cooley-Tukey algorithm (with fixed point coefficients in a lookup table) to compute the frequency components. (Link: Cooley-Tukey FFT algorithm)

It turns out we really don’t need all those frequencies. Most of the audio range is contained in the first two bins you see on the monitor currently. We will change the visualization to only display those frequencies in a later iteration of the design.


If you’re interested in seeing more on the implementation for this project, you can check out Zhemao’s VHDL at his GitHub here.

(via YouTube)

 
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Check Out The BeagleBone Black And A… Bacon Cape?!


A couple of weeks ago while we were getting our geek on at Design West, we were fortunate enough to meet and chat with a couple of the guys from CircuitCo - makers of the BeagleBone platform. They gave us a BeagleBone Black and a Bacon Cape(!) to check out and hack around with. We’ll post some of our own BeagleBone video here on the blog soon, but for now you can take a minute to check out the official video above. It is just a quick video tour of the board, and a good overview of the features it has. If you’re not familiar with it yet, the BeagleBone platform is going to be along the same lines as the Raspberry Pi and pcDuino, but with its own unique features and specs.

Quick overview and specs:

BeagleBone Black is a $45 MSRP community-supported development platform for developers and hobbyists. Boot Linux in under 10 seconds and get started on development in less than 5 minutes with just a single USB cable.

  • Processor: AM335x 1GHz ARM® Cortex-A8
  • 3D graphics accelerator
  • NEON floating-point accelerator
  • 2x PRU 32-bit microcontrollers
  • Runs Linux, Android, Ubuntu, Cloud9 IDE on Node.js w/ BoneScript library, and much more
  • Connectivity:
    • USB client for power & debug
    • USB host
    • Ethernet
    • HDMI
    • 2x 46 pin headers

The next video here is from Design West, and it’s a quick demo of the Bacon Cape add-on for the BeagleBone. I love the name, and I take it that the designers are well aware that bacon makes everything better…

(via BeagleBoard)

 
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Listen: Jack’s Presentation From Design West 2013

Happy Friday, gadgetheads! We’ve got an audio treat for you today, from last week’s industry event Design West Expo 2013 in San Jose.  Our founder and CEO Jack Gassett gave his first  presentation ever, on Designing an Open Source Arduino/FPGA Development Board.  There were lots of people at the show that we recognized from the forums and website, and it was a pleasure to finally get to put names to faces.  It was great to meet you guys, so many thanks to everyone that showed up and introduced themselves!

The photo above shows Jack (left) hanging out with Raspberry Pi’s Gert van Loo (right) at the expo. Gert designed the original alpha hardware that the Raspberry Pi Model B is based on, as well as the new Gertboard. If you look closely, you’ll see (appropriately enough) Jack’s pin that says “I <3 FPGAs,” and Gert’s pin which reads “I <3 Raspberry Pi.”  Lulz and good times!

We also wound up meeting the boys behind the BeagleBone - they gave us a BeagleBone Black to check out!  We will be making a post to the blog about it in the next couple of days, so keep it here on this channel!

On to the substance. We inexplicably didn’t come up with any video from the show, but we do have an audio capture from Jack’s presentation (thankfully!) that you can get at the link below… so take it with you and listen to it podcast-style!  We also have a link to download the Powerpoint presentation from the show.

Jack’s seminar, Designing an Open Source Arduino/FPGA Development Board covers everything from the story of the Papilio hardware’s development, to the AVR8 and ZPUino Soft Processors, to some great info on the Papilio System on Chip (Schematic Editor).  Awesome show, Jack!

Powerpoint presentation – Powerpoint and Word

Audio capture from Jack’s presentation

We’d like to thank everyone that showed up to rock Design West with us, and everyone who is a part of the Gadget Factory community.  We couldn’t have gotten anywhere without you!

 
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Hardware And The Bitcoin Goldrush

Published on May 1, 2013 by in FPGA


Bitcoin is an experimental digital currency, best described as a peer-to-peer electronic cash system. Bitcoin is known for its volatility – values of the currency can fluctuate wildly in a relatively short period of time. But there’s a virtual goldrush going on these days for the stuff, and the tools used to get at the gold include everything from high-end graphics cards to FPGAs to ASIC-based Bitcoin mining rigs.

There’s an interesting article up at DesignSpark about the very in-vogue Bitcoin madness and the hardware that some folks are using to get their share. You guys should take a minute to check it out!

There’s a new gold rush, but this time the tools of choice are algorithms and HDL skills instead of pick axes and pans, and machines not people are doing the mining.

Bitcoin, the decentralised digital currency, has barely been out of the news of late and in recent days it reached a new high value of $266 before proceeding to plummet to under $100 — an event which has been attributed to a significant surge in interest and much increased media coverage.

Learn more: Bitcoin (Wikipedia)

Do any of you have any experience with this whole Bitcoin thing? We’d love to hear your story – hit us up in the comments!

(via DesignSpark)

 
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