Hamster tipped us off to this nice guide about generating memories with the Xilinx wizards.
The objective of this lab is to illustrate the use of ROM and block RAM memories located inside the FPGA – a Spartan-6 in the case of our Atlys board. We’ll learn how to use the ISE’s Core Generator tool to create BRAMs. Depending on what your course project will do, you may need to use such memories in your project.
The contents of these memories will be read continuously and displayed on the 7 LEDs. Slide switch SW(0) is used to select between the two outputs of the two memories to drive the LEDs. A simplified representation of this functionality is shown in the block diagram in Fig.1.