Developments in open source are not just exciting as viable and marketable options, but as a real boon for innovation. Growing interest along with shared goals to create and better developments in science and technology inspired a team at CERN to create the Open Hardware Repository and Open Hardware License. Additionally, open source hardware groups hope to inspire more people from diverse backgrounds to join the innovation.
Exciting news! We just hit a major milestone with a DesignLab 0.2.0 release for both Windows and Linux that can be downloaded here. This is the first release that has all of the core functionality envisioned for DesignLab in place:
- -Every sketch has an FPGA circuit associated with it and there is smooth integration between the sketch interface and the Xilinx schematic editor.
- -No longer any need to jump through hoops to configure Xilinx ISE to work with DesignLab. As long as you have Xilinx ISE Webpack installed DesignLab will take care of the rest.
- -Logic Analyzer functionality is working under Windows and Linux.
- -The ZPUino Soft Processor has been updated to 2.0 with exciting new features like automatic discovery of what peripherals are connected to Wishbone slots.
- -Flex pins allow you to connect the output from any chip to a pin that can be moved on the fly to any physical pin on the Papilio DUO board. For example, a single line of code allows you to move the output of a UART to any of the 54 available pins.
- -DesignLab Libraries are very ease to create and share now. Put all of the Schematic symbols, VHDL, working circuits, and example C code in one library directory and DesignLab takes care of including it in all the right places.
- -DesignLab Libraries have been greatly expanded to include C++ code, Xilinx Schematic Symbols, VHDL, Verilog, EDIF, and NGC files.
Excellent method to infer a Block RAM memory block of any size in simple code that works for Xilinx and Altera devices. I needed to generate some BRAM for a DesignLab module I was putting together and I remembered I had seen this somewhere but couldn’t remember where… Some digging in google brought this back up so I thought I better get this posted to the blog so we can easily find it in the future.
I’m a big fan of inference, especially as it applies to writing synthesizable Verilog code for FPGAs. Properly coded, a module that infers technology-dependent blocks (e.g. block RAMs) should: be portable between devices from a particular vendor (e.g. Spartan 3E to Virtex 6), be portable between devices from different vendors (e.g. Spartan 6 to Cyclone III), and even be portable to vendor-independent environments (e.g. simulation in Icarus Verilog).
Wire wrapping is an incredible prototyping method that produces very secure and clean circuits on perf boards. When you are ready to move beyond the breadboard but not ready to design a pcb then wire wrapping is the perfect solution. But, if you are like me you always heard of wire wrapping but never saw a good example of how to actually do it! Instead of scouring news groups and forums for hints on how wire wrapping works, like I had to do, Bil Herd comes to our rescue with a nice Wire Wrapping tutorial that lays everything out in one place. If you don’t already use wire wrapping it is a skill well worth learning. The tools are cheap and easy to get a hold of, wire wrapping wire still sells at Radio Shack even though they no longer sell the $3 tool. Ebay is probably the best bet to get a wire wrap tool these days…
Properly done a wire wrap assembly is capable of fairly high speed and acceptable noise when the alternative option of creating a custom PCB would take too long or not allow enough experimentation. Wire wrap is also used in several types of production, from telco to NASA, but I am all about the engineer’s point of view on this.
I was browsing HackADay when I came across an article called, “FPGA Ambilight Clone Packs a Ton of Features“. I immediately got excited and thought, “I hope we can port this to the Papilio.” When I opened the article I saw to my great delight that the project WAS done on the Papilio! Even better the author created a MegaWing for the project. First thing I thought was how amazing this would be in my own living room and that I want to make one of these MegaWing’s for myself. My next thought was, well maybe I should talk to Esar about doing a batch of these boards so everyone can enjoy this project. I’ve sent a message to Esar and hopefully we can get a batch of these boards made. In the meantime, check out how amazing this project is!
- Direct HDMI input at up to 1920×1080 60Hz
- Drive up to 8 strips of LEDs at full frame rate
- Up to 512 LEDs per strip for a total of 4096 LEDs
- Each LED can take it’s colour from any one of 256 arbitrary screen areas
- Each LED can use one of 16 colour correction matrices
- Each LED can use one of 8 sets of gamma correction tables (separate tables for each R, G, B channel)
- Output can be delayed up to 8 frames with microsecond steps for precise synchronisation with TV
- Configurable temporal smoothing
- Up to 64 configurations can be stored in flash memory
- Automatic letterbox/pillarbox detection which can trigger loading of different configurations from flash memory
- Configurable via serial console with a greatly extended command set
Check out this FPGA project that uses a camera module and laser to do obstacle and cliff detection. It’s Wishbone compatible so we should be easily able to import this project into DesignLab.
Somewhere down the road, you’ll find that your almighty autonomous robot chassis is going to need some sensor feedback. Otherwise, that next small step down the road may end with a blind leap off the coffee table. The first low-cost sensors we might throw at this problem would be sonars or IR rangefinders, but there’s a problem: those sensors only really provide distance data back from the pinpoint view directly ahead of them.
Hamster puts together a nice tutorial with code about driving a stepper motor with an FPGA.
Driving a stepper motor using an external driver board is a bit tricky when using a microcontroller. With an FPGA it is a piece of cake!