ZPUino is a SoC (System on a Chip) developed by Álvaro Lopes , a senior engineer from Critical Software in Coimbra and a blogger at the EE Times . It’s a 32 bits, 100Mhz CPU implemented in a FPGA , and programmed using the Arduino tools and a specific schematics editor for the hardware parts (internal peripherals). At the Lisbon Maker Faire he’s going to demonstrate the system and its connection to more complex hardware. He will be using 9 different FPGA boards, lots of peripherals, RGB LED panels and strips, HDMI output video (with a monitor), Audio (directly from the FPGA with an audio codec). You will see games, interactive applications, and other. The ZPUino has been used in projects like the Soundpuddle , the RetroCade Synth , and others . We specially like its use in the Papilio Arcade MegaWing : We can’t wait! Comments comments powered by Disqus
The Zynq Book is the first book about Zynq to be written in the English language. It has been produced by a team of authors from the University of Strathclyde, Glasgow, UK, with the support of Xilinx. We wanted to create an accessible, readable book that would benefit people just starting out with Zynq, and engineers already working with Zynq. We hope that it will prove a handy reference that remains on your desktop! You can find out more about the book’s contents on the About page.
Pedro Hernandez is a cofounder of Pcdemano.com a spanish website that makes reviews about the Arduino, raspberry pi, BananaPi and more. He recently decided to add FPGA’s to that list and chose the Papilio Pro as an FPGA development board to start with.
Today he posted his first review for an FPGA board and a nice introduction to FPGA’s for all the Spanish speakers out there.
Check out this amazing project from John Beetem. Make small Digital Logic designs without the heavyweight vendor tools. Flavia tool chain lets you make bit files for the Papilio One 250K with completely FLOSS software! Only CPLD sized designs are possible, but this is a boon for learning Digital Logic on ARM based boards like the Raspberry Pi.
Abstract: Flavia is a family of logic arrays that can be designed and programmed entirely using free-as-in-freedom (FaiF) software. This is in contrast to standard FPGA (Field-Programmable Gate Array) tools from vendors such as Xilinx, Altera, Lattice, Cypress, and MicroSemi (formerly Actel) where you must use the vendor’s software to design the FPGA. Except for a part from Atmel that never caught on, the author is not aware of any commercial FPGA or CPLD (Complex Programmable Logic Device) that can be designed without running its vendor’s tools.
Check this out, this is really cool. In this video Hamster grabs HDMI input from a special Wing that he designed and then converts it to 8-bit VGA format so he can send it out of the 8-bit VGA port of the LogicStart MegaWing!
Take a look at this video of it in action:
Great news! Papilio DUO pre-orders are finally here , we are using Backerkit to take pre-orders and we are offering so many exciting add-ons with some good discounts.
Please visit the pre-orders page here to take advantage from these discounts and make sure you get your Papilio DUO board as soon as we get them in stock.
The most obvious factor when choosing an oscilliscope is bandwidth. 50MHz is better than 20MHz, and 100MHz is definitely better than 50MHz, etc., but what does that number really mean, and how fast is fast enough for your needs? There are already some good resources out there that go into exhaustive details on this … but for the executive summary read on.
The brains of the outfit is a $5, 100-pin CPLD from Xilinx. Apart from that, the rest of the components are a crystal, PLL, and an almost hilarious number of resistors for the R2R ladder. The one especially unique component is the 25.056815 MHz crystal – multiply by that by two, and it’s fast enough to drive a VGA monitor. Divide the crystal by seven, it’s the 3.579545 MHz you need for an NTSC colorburst frequency. That’s VGA and NTSC in a single programmable logic project, something the one FPGA project we could find that did color NTSC couldn’t manage.